Cyril Prasanna Raj P is currently working as Assistant professor and Course Manager in VLSI System Design Center, MS Ramaiah Institute of Advanced Studies, Bangalore. He has around 12 years of experience in VLSI design. His expertise is analog and mixed signal design, and has executed multiple projects in this domain. Prior to this he had worked exclusively on HDLs and FPGAs. He has executed couple of R & D projects and also industrial projects in FPGAs and signal processing He is currently pursuing his PhD from Coventry University, UK in the field of mixed signal design and signal processing.